1. Field of the Invention
This invention relates to a digital-to-analog (D/A) converter, more specifically a D/A converter which self calibrates and is biased to operate at high resolution and at high speed.
2. Discussion of Related Art
In D/A conversion designs intended for operation at higher speeds, such as at 10 Msample/second, transistor matching is often employed to achieve the desired resolution and accuracy. This approach proves successful to about 8-9 bits of resolution. In high speed applications requiring more than 8-9 bits performance, other techniques, such as laser trimming at wafer level, or dynamic calibration may be needed.
Dynamic calibration of voltages, currents or charges when converting from digital data to analog signals is typically performed to provide analog outputs proportional to digital input codes. Transistors are generally used to build up the desired voltage, current or charges which correspond to the actual digital input codes.
Several design techniques for achieving most significant bit (MSB) and least significant bit (LSB) calibration in D/A converters have been proposed. For example, U.S. Pat. No. 5,021,784 to Groeneveld et al. discloses a signal source arrangement which includes a group of calibrated signal sources, i.e., currents, where each signal source produces an identical unit signal. The unit signals are then combined to form an output signal. Each signal source also produces a similar undesirable spurious signal caused by the calibration procedure. The operating signal sources are calibrated successively and continuously to minimize the undesirable effect of the resulting spurious signals in the combined output signal.
A drawback in the prior art self-calibrating D/A designs is their lack of high resolution and accuracy at high operating speeds. This is because there exists a time interval, however small, where the operation voltages, currents or charges for an array of D/A cells is not equal to the calibration reference voltages, currents or charges. As a result, when operating the D/A converters at high speeds the operating voltages, currents or charges for each cell in the D/A array may be calibrated to be approximately equal to the voltage and current calibration reference points. The technique of fixing operating voltages, currents or charges for at least the MSB cells in the D/A array at values equal to the calibration reference values has been proposed. See "A Self-Calibration Technique For Monolithic High-Resolution D/A Converters" by Groeneveld et al., IEEE Journal of Solid State Circuits, Vol. 24, No. 6, December 1989, pages 1517-1522.